A Phase Lock Loop (PLL) is an electrical circuit usable to generate an oscillating signal by comparing a reference signal and a feedback signal obtained by frequency-dividing the generated oscillating signal. As such, electrical signals in a PLL form an electrical feedback loop, and the PLL is considered functional if, among other factors, the electrical feedback loop is stable. The electrical feedback loop is stable when a signal fluctuation in the PLL at a particular node along the electrical feedback loop is attenuated rather than amplified over time. Although a PLL design may be meant to be stable on the circuit diagram, in the context of mass production of PLLs based on the PLL design using semiconductor manufacturing processes, some of the manufactured PLLs become unstable due to process, voltage, and temperature (PVT) variations.